1. Field of the Disclosure
The present disclosure relates to a liner amplifier using a nonlinear amplifying stage, and more particularly, to a linear amplifier using a nonlinear amplifying stage in which a multi-amplifying stage formed in cascade is implemented to have a nonlinear characteristic, and final output power of an amplifier is implemented to have a linear characteristic.
2. Description of the Related Art
Generally, a power amplifier used in a wireless terminal is formed of an amplifier consisting of two or more stages, thereby securing power required from the power amplifier or a voltage gain. For example, a two-stage power amplifier is formed of a drive-amplifying stage and a power-amplifying stage. The drive-amplifying stage serves to drive the power-amplifying stage so as to secure a gain of an entire power amplifier, and then the power-amplifying stage serves to obtain a value in which final output power is required.
In the case of the power amplifier, since the final output power is determined depending on how the power-amplifying stage is designed, a design of the power-amplifying stage is significantly important. Generally, the drive-amplifying stage is designed to secure a high power gain, and the power-amplifying stage is designed to secure high output power.
One of core design purposes of the power amplifier is to secure linearity between input power and output power. Since the output power and the linearity are mutually in a trade-off relationship, it is significantly difficult to secure the high output power while maintaining the high linearity. Therefore, the entire linearity of the power amplifier is determined in accordance with not the drive-amplifying stage having low output power but the power-amplifying stage having the high output power.
FIG. 1 is a drawing illustrating a structure and a gain characteristic of a power amplifier according to a related art. Part (a) of FIG. 1 illustrates a simplified circuit diagram of a two-stage power amplifier formed in a MOSFET, and part (b) of FIG. 1 illustrates a power gain curve according to Part (a) of FIG. 1.
In part (a) of FIG. 1, a drive-amplifying stage and a power-amplifying stage are connected in cascade. An input matching network is formed at a front end of the drive-amplifying stage and an inter-matching network is formed between the drive-amplifying stage and the power-amplifying stage, and an output matching network is formed at a rear end of the power-amplifying stage.
Referring to part (b) of FIG. 1, in the power gain curve, Gtotal represents a final power gain of the two-stage power amplifier. Further, Gdrv represents a power gain of the drive-amplifying stage, and Gpower represents a gain of the power-amplifying stage.
As described above, the drive-amplifying stage of the power amplifier according to the related art has the relatively high power gain, and the power-amplifying stage is designed to generate the high output power instead of having the relatively low power gain. In this case, the drive-amplifying stage and the power-amplifying stage are respectively provided with a linear region. The sum of the power gain in the linear regions of respective amplifying stages becomes Gtotal representing the power gain of a final power amplifier.
In the case of a general amplifying stage, as a gate bias voltage increases, the power gain in a low output power region increases. The amplifier according to the related art is designed to select the gate bias voltage in which the linear region can be secured the most. However, as a method to secure the linear region further widely, the related art uses the method of sacrificing the power gain and of increasing a transistor size of the power-amplifying stage.
In this case, since the method of sacrificing the power gain additionally requires the drive-amplifying stage to compensate the reduced power gain, which results in several drawbacks that DC power consumption is increased, and efficiency of the entire amplifier is reduced, and an entire IC area and production cost are increased. In addition, since the method of increasing the transistor size of the power-amplifying stage also requires the drive-amplifying stage, which leads to several drawbacks that the production cost is increased, and efficiency of power conversion is reduced, and the efficiency of the power conversion in the low output power region excessively deteriorates.
A background technique of the present disclosure is disclosed in Korean Patent Laid-Open Publication No. 2002-0074784 (Published on Oct. 4, 2002).
The above information disclosed in this Background section is only for enhancement of understanding of the background of the disclosure and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.